There are a couple of existing solutions for testing memory systems. First, standard testing can be performed on a memory system that has been completely constructed, including a fully functional memory controller and dual in-line memory modules (DIMMs). However, if the memory system has not been constructed, testing is typically limited to testing of individual dynamic RAM (DRAM) chips, or DRAM chips and support chips on standard memory modules. Such testing is typically performed by a production memory tester, which is a very costly system. In addition to the high cost, another problem with this approach is that the production memory tester tests memory devices in an environment that is different than an actual memory system. A production memory tester typically uses a simplified test “lumped” load, whereas the actual load in a memory system is a transmission line with “distributed” loads along it, such as DIMMs, a memory controller, terminators, and other loads. This frequently causes problems since the memory supplier publishes a data sheet with timing parameters that may differ from the parameters of an actual system.
It would be desirable to provide a memory controller emulator that would allow testing of a memory system to be performed before the actual memory system has been completely constructed.